2004 Microchip Technology Inc.
DS30491C-page 305
PIC18F6585/8585/6680/8680
REGISTER 23-35: BnDLC: TX/RX BUFFER n DATA LENGTH CODE REGISTERS IN TRANSMIT MODE
[0
≤ n ≤ 5, TXnEN (BSEL<n>) = 1](1)
REGISTER 23-36: BSEL0: BUFFER SELECT REGISTER 0(1)
U-0
R/W-x
U-0
R/W-x
—TXRTR
DLC3
DLC2
DLC1
DLC0
bit 7
bit 0
bit 7
Unimplemented: Read as ‘0’
bit 6
TXRTR: Transmitter Remote Transmission Request bit
1
= Transmitted message will have RTR bit set
0
= Transmitted message will have RTR bit cleared
bit 5-4
Unimplemented: Read as ‘0’
bit 3-0
DLC3:DLC0: Data Length Code bits
1111
-1001 = Reserved
1000
= Data length = 8 bytes
0111
= Data length = 7 bytes
0110
= Data length = 6 bytes
0101
= Data length = 5 bytes
0100
= Data length = 4 bytes
0011
= Data length = 3 bytes
0010
= Data length = 2 bytes
0001
= Data length = 1 bytes
0000
= Data length = 0 bytes
Note 1: These registers are available in Mode 1 and 2 only.
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
- n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
R/W-0
U-0
B5TXEN
B4TXEN
B3TXEN
B2TXEN
B1TXEN
B0TXEN
bit 7
bit 0
bit 7-2
B5TXEN:B0TXEN: Buffer 5 to Buffer 0 Transmit Enable bit
1
= Buffer is configured in Transmit mode
0
= Buffer is configured in Receive mode
bit 1-0
Unimplemented: Read as ‘0’
Note 1: This register is available in Mode 1 and 2 only.
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
- n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
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